French SOI Wafer Manufacturers Guide (2026)

France is the global capital of silicon-on-insulator wafers. The entire category is anchored in Bernin, a small town near Grenoble where Soitec runs the production lines that supply roughly 70% of the world’s RF-SOI substrates. According to Soitec’s FY2025 results, the company closed the year at EUR 891 million in revenue with four product platforms each generating around $100 million or more.

This guide is for buyers, foundry partners, and material suppliers who need to understand the French SOI base and how to reach it without relying on dying conventional channels.

Why SOI Wafers, and Why France

A standard bulk silicon wafer carries the active transistor layer directly on the silicon substrate. An SOI wafer inserts a thin layer of buried oxide between them. That oxide is the entire game. It cuts parasitic capacitance, isolates the transistor electrically, and removes the need for many design compromises that bulk CMOS forces on chip designers. The result is lower power, higher RF performance, and inherent radiation and fault tolerance.

The technology was incubated at CEA-Leti in Grenoble in the 1990s and then commercialised through Soitec, which was spun out of the lab. Forty years later the French industrial base still defines the category. As EE Times Europe noted, “the FD-SOI adventure was born at CEA-Leti’s laboratories in Grenoble” and the surrounding cluster, including the STMicroelectronics-GlobalFoundries fab in Crolles, remains Europe’s centre of gravity for low-power CMOS.

The buyer audience for French SOI is concentrated and technical: foundries like GlobalFoundries, Samsung Foundry and STMicroelectronics, fabless designers building RF front-end modules and edge-AI MCUs, and a growing list of silicon photonics players targeting AI data centres.

The French SOI Manufacturer Base

The French SOI base is essentially one industrial entity and a research engine that feeds it.

Soitec is the production company. Its Bernin campus near Grenoble runs the proprietary Smart Cut layer-transfer process that defines the modern SOI category. The company is publicly listed on Euronext Paris under ticker SOI. Production is split across multiple platforms covering RF, low-power compute, power electronics, image sensors, photonics, and piezoelectric filters.

CEA-Leti is the upstream research institute that originated FD-SOI and continues to co-develop next-generation substrate work with Soitec. The two organisations share roadmap responsibility for the technology and run joint cybersecurity and automotive programmes from Grenoble.

The cluster surrounding them includes STMicroelectronics in Crolles, which is one of the largest FD-SOI consumers globally, and equipment and chemicals suppliers feeding the wafer line.

For practical procurement purposes, French SOI wafers means Soitec. There is no second domestic producer at scale, and the global competition is limited to a handful of specialty wafer firms outside France that hold materially smaller market shares.

The Six Product Platforms Buyers Should Know

Soitec splits its catalogue into six platforms. Each has a distinct buyer profile.

RF-SOI is the volume product. It is the dominant substrate for the RF front-end modules in every modern smartphone. Roughly 70% of global RF-SOI substrates come out of Bernin. FY2025 was a correction year because customers had built large RF-SOI inventories during the post-pandemic chip cycle. CEO Pierre Barnabe described it as a “high-single digit decline” in his FY2025 commentary, with the company withdrawing annual guidance and reporting on a quarterly basis until the inventory normalises.

FD-SOI is the fully depleted platform used for ultra-low-power MCUs and edge-AI inference chips. STMicroelectronics, GlobalFoundries and Samsung Foundry all run FD-SOI nodes on Soitec substrates. The platform is now mature at 22 and 18 nanometres with research lines pushing further.

Power-SOI serves power management ICs and BCD processes. It crossed roughly $100M in annual revenue in FY2025, joining RF-SOI as a mature product line.

Imager-SOI is used for backside-illuminated CMOS image sensors. Soitec announced an anticipated phase-out of this platform in FY2026, with revenue impact factored into Q1 2026 guidance.

Photonics-SOI is the platform most analysts are watching. It is the substrate underneath silicon photonics chips used for co-packaged optics in AI data centres. According to Semiconductor Today, co-packaged optics architectures deliver approximately 30% energy savings versus traditional pluggable optical transceivers, which is why hyperscalers are accelerating the transition. Soitec joined the SEMI Silicon Photonics Industry Alliance in 2025 to position for that ramp.

POI (Piezoelectric-on-Insulator) is the newest commercial platform, used for advanced RF filters in 5G and Wi-Fi 7 radios. It also crossed roughly $100M in FY2025, with 13 customers in production and a further set in qualification.

Three of the six (FD-SOI, Power-SOI, POI) each generate around or above $100M annually, with RF-SOI still the largest by a wide margin.

The 2025-2026 Strategic Shift

Two announcements out of Grenoble in 2025 reset the French SOI narrative for the next cycle.

In June, CEA-Leti and Soitec announced a strategic partnership targeting FD-SOI for hardware cybersecurity in automotive and industrial IoT. Christophe Maleville, Soitec’s Senior Executive Vice President for Innovation and CTO, said in the announcement: “This partnership with CEA-Leti reflects our strategic ambition to position FD-SOI as a reference platform for secure and energy-efficient electronics.” Jean-Rene Lequepeys, CEA-Leti CTO, framed the rationale: “In an era marked by increasing attacks on connected systems and autonomous vehicles, the need for embedded hardware capable of resisting physical tampering has never been greater.”

The follow-up disclosure in October 2025 was concrete. In side-by-side testing against 28-nanometre bulk CMOS, 22FDX FD-SOI substrates required up to 150 times more effort and higher laser power to induce a fault during laser fault injection attacks. That has direct implications for automotive cybersecurity under ISO/SAE 21434 and for secure-element designers across the industrial IoT base.

The second shift is the AI data centre pull on Photonics-SOI. Pierre Barnabe addressed this directly: “The coming shift to CPO-based data-center architectures is a major opportunity for Soitec’s advanced semiconductor materials, and momentum for widespread CPO adoption is building.” Photonics-SOI sales in Q1 2026 were materially above Q1 2025 levels even as the overall RF-SOI base was working through inventory correction.

These two vectors, secure FD-SOI for automotive and Photonics-SOI for AI infrastructure, define what the French SOI category will look like in 2026 and 2027.

The EU Chips Act Context

The EU Chips Act sits behind much of this activity. The largest single project under the act in France is the EUR 7.5 billion STMicroelectronics-GlobalFoundries megafab in Crolles, which received approximately EUR 2.9 billion in approved French state aid for advanced node FD-SOI manufacturing. The project status changed in 2025: EE Times Europe reported that “the partnership has been placed on hold” as the structural design of the act creates friction between fast-moving market needs and slow disbursement mechanics.

That delay does not change Soitec’s position. The wafer supplier is upstream of the foundries, and the French SOI base sells globally regardless of which fab adds capacity. The European Commission has signalled a Chips Act 2.0 legislative proposal for Q1 2026, which is expected to address some of the structural rigidity that slowed the first round.

For buyers and partners, the takeaway is that French SOI capacity expansion will keep moving forward inside Soitec’s existing footprint and the parallel French SiC initiative the company is also running, independent of the foundry-side delays.

Dying Conventional Channels for SOI Sales

The SOI customer universe is small, technical and concentrated. That concentration has historically made conventional B2B channels work, but most of them have decayed materially over the last three years.

SEMICON Europa, SEMICON West, SEMICON Japan are the traditional venues for substrate and equipment business development. Booth and travel costs for a single SEMICON cycle now run well into six figures for a serious presence, and the qualified-lead ratio has dropped as foundry and IDM procurement teams have moved most early-stage technical conversations to private supplier days and online portals. Trade-fair leads cost between $300 and $900 per qualified opportunity and the cost scales linearly with attendance.

IEDM (International Electron Devices Meeting) and the VLSI Symposium still matter for technical positioning, but they are research conferences, not procurement venues. Treating them as sales channels produces almost no commercial pipeline.

OEM direct relationships with the major foundries (GlobalFoundries, STMicroelectronics, Samsung, TSMC, UMC) matter, but they cover at most a dozen accounts. They do not reach the long tail of fabless designers, automotive Tier 1s, defence integrators, photonics startups, MEMS houses, and university research groups that increasingly drive SOI demand outside the top foundries.

Field sales representatives with semiconductor materials backgrounds cost EUR 180,000 to EUR 320,000 fully loaded in Western Europe. Their qualified lead cost lands between $500 and $1,200 and gets worse as the territory grows, because senior salespeople do not scale linearly.

Distributors and trading houses add little in a market this technical. Substrate procurement decisions involve foundry process integration, qualification cycles measured in quarters, and direct technical contact with the wafer supplier. Distributor margins simply erode the supplier’s price without creating new demand.

The structural problem is reach. There are perhaps 200 to 400 commercially relevant SOI buyer organisations globally, spread across foundries, fabless designers, IDMs, defence primes, photonics startups, and research institutes in roughly 25 countries. Covering that list with field sales and trade fairs is mathematically uneconomic. Covering it with cold calling fails because senior procurement and CTO contacts in Korea, Taiwan, the US, Germany and Japan do not pick up phones from unknown numbers.

Where AI Outbound Fits

papaverAI builds AI-driven outbound engines for B2B manufacturers in exactly this kind of high-value, low-volume buyer landscape. The qualified-lead cost on the engine starts between $150 and $300 and moves down over time as the system learns the patterns of which titles, accounts and messages convert in a given sector.

The pattern works because the inputs the engine needs (named buyer titles, account lists, technical positioning) are deterministic for a category like SOI. The number of relevant accounts is finite. The relevant titles (foundry process integration managers, fabless RF designers, photonics R&D leads, automotive cybersecurity architects) are findable. The engine handles language coverage across Korean, Japanese, German and French markets, which a human SDR team cannot economically replicate.

The compounding part matters more than the starting cost. Trade fairs scale linearly: double the booths, double the cost. Field sales scales worse than linearly because senior hires take 12 months to ramp. An AI outbound engine compounds: every new reply, every account-research artefact, every qualified meeting becomes training signal for the next cycle. The floor on cost-per-lead drops over time while reach expands.

For buyers and partners working with French SOI, this matters because the addressable market for ancillary services (equipment, chemicals, design IP, packaging, test) is exactly the kind of long-tail, multi-country, technically specific list that conventional channels cannot cover and that AI outbound was built for. The pillar guide on French electrical and electronics exporters covers the broader category context, and the France manufacturing exports overview sets the wider trade backdrop.

How to Approach the French SOI Cluster

For a buyer or supplier trying to engage the French SOI base, the practical sequence is straightforward. Start with Soitec’s investor relations and corporate materials, which are unusually open for a wafer supplier. The FY2025 Universal Registration Document and quarterly press releases give product-line revenue splits, customer concentration data and capacity disclosures.

For technical engagement, CEA-Leti runs structured partnership programmes through its industrial relations team in Grenoble, and the Minalogic competitiveness cluster acts as the formal entry point for foreign companies trying to enter the Grenoble semiconductor cluster.

For commercial development outside France, the long tail of SOI-adjacent buyers in Korea, Taiwan, Japan, Germany, the US, Israel and increasingly India is where conventional channels break down and a structured outbound engine pays back fastest.

FAQ

Who manufactures SOI wafers in France? Soitec is the only commercial-scale SOI wafer manufacturer in France. Its production is concentrated at the Bernin site near Grenoble. CEA-Leti, also in Grenoble, runs the upstream research that originated FD-SOI and continues to co-develop the technology with Soitec.

What was Soitec’s revenue in fiscal year 2025? Soitec reported FY2025 revenue of EUR 891 million, down 9% year on year. EBITDA margin was 33.5% and free cash flow was positive at EUR 26 million. The decline was driven by an RF-SOI inventory correction at downstream customers, and the company is now guiding quarterly rather than annually until the cycle normalises.

What is Photonics-SOI used for? Photonics-SOI is the substrate layer used in silicon photonics chips. Its largest growth driver is co-packaged optics in AI data centres, where it enables roughly 30% energy savings versus pluggable optical transceivers. It is also used in LiDAR for ADAS, healthcare sensors, and quantum key distribution systems.

How does FD-SOI improve cybersecurity? The FD-SOI architecture inserts an oxide layer between the transistor channel and the substrate. That isolation increases the energy and precision needed to induce a fault. In CEA-Leti testing, 22FDX FD-SOI required up to 150 times more effort than 28-nanometre bulk CMOS to produce a successful laser fault injection attack, which has direct relevance for ISO/SAE 21434 automotive cybersecurity certification.

Is the STMicroelectronics-GlobalFoundries Crolles megafab still happening? The EUR 7.5 billion Crolles project, which received EUR 2.9 billion in French state aid under the EU Chips Act, was placed on hold in 2025. The wider Chips Act framework is being revised, with a Chips Act 2.0 proposal expected from the European Commission in Q1 2026. The delay is foundry-side and does not affect Soitec’s wafer production capacity in Bernin.

How do you reach the global SOI buyer base? The buyer base is small, technical, and geographically dispersed across roughly 25 countries. Conventional channels (SEMICON, IEDM, field sales, distributors) cover only the largest accounts and scale poorly. AI outbound engines reach the long tail of fabless designers, photonics startups, defence integrators and research groups at a qualified-lead cost between $150 and $300 that compounds downward over time.